1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory used for storing data in portable data processing devices.
This application is based on Patent Application No. Hei 10-087707 filed in Japan, the contents of which are incorporated herein by reference.
2. Background Art
Conventional flash EEPROM has drawbacks in that read errors often occur caused by a reduced writing threshold voltage or an increased erasure threshold voltage due to manufacturing variations or to rewriting stress.
Since this problem is caused when the writing threshold voltage is degraded to a lower voltage than the read-out voltage or when the erasure threshold voltage is degraded so that it becomes greater than the read-out voltage, it is always required before writing step to optimize the threshold voltages so as to reduce the threshold voltage of erasing to be less than the read-out voltage and to increase the threshold voltage of the writing to be greater than the read-out voltage.
In order to solve the above described problem, a technique was proposed in Japanese Patent Application, First Application No. Hei 5-28788, in which, the writing condition for writing into the second memory cell array 2, used for writing data-bits for monitoring changes of the threshold voltages over time, is varied from the writing condition for writing into the first memory cell array 1, and if a degradation of the writing condition is found, the first memory cell array is rewritten. As shown in FIG. 5, the technique disclosed in the above document still has the problem that the reading voltage cannot be optimized, since the erasure threshold voltage is not monitored.
That is, a problem still remains in that, when the erasing voltage increases into larger than the reading voltage due to a deterioration of the threshold voltage level, reading failure occurs.
It is therefore the object of the invention to provide a non-volatile semiconductor memory device, which is capable of setting or establishing the optimum reading voltage in comparison with the erasure threshold voltage and also of setting or establishing the optimum writing time based on the reading voltage by detecting the writing threshold voltage and the erasure threshold voltages of the memory cell array for writing data-bits for monitoring the deterioration over time.